Input/output (I/O) pads are the interface between the core of an integrated circuit and external circuitry. Each I/O pad includes a contact site, which is an area where an electrical connection can be made between the core of the integrated circuit and external circuitry. I/O pads also include auxiliary circuits, such as electrostatic discharge (ESD) circuitry that protects the core from damage due to electrostatic discharge, and output driver circuitry designed to buffer the output so that it can drive an off-chip load.
Due to area constraints in semiconductor design, the large sizes required for the output driver transistors in I/O pads are typically achieved by connecting multiple smaller transistors in parallel. FIG. 1A shows a transistor 101 that is designed to have a width of W and a length of L. In physical layout however, transistor 101 may be “folded”—that is, made into smaller transistors connected in parallel—to accommodate space constraints of the integrated circuit. FIG. 1B shows transistors 103A, 103B, and 103C connected in parallel, each having a width of W/3 and a length of L. The transistors 103A–C of FIG. 1B, taken together, have the equivalent drive strength of transistor 101 in FIG. 1A.
Manufacturing defects may disable one or more of the transistors in a parallel configuration such as FIG. 1B, diminishing the full drive strength of the output driver. To detect such a defect, the conventional method is to probe the contact site with mechanical probes (typically arranged on a probe card) that introduce a test load at the contact site. Then, the current flowing through the output driver is measured. If the current measured matches the expected drive strength of the transistors, then each of the parallel transistors is operating as expected. However, if the current is less than expected, then at least one of the transistors is not operative, and the full drive strength of the output driver is not available.
The conventional test method requires that the contact site be physically probed in order to present a load to the contact site, or to run a variety of other tests that confirm the functionality of the circuits within the I/O pad. However, the number of I/O pads is continually increasing, and the size of the semiconductor devices is continually shrinking. Consequently, the arrangement of the probes on the probe card grows denser and more complicated, and the probe card becomes more expensive to manufacture. Furthermore, the process of making a physical connection between the probes and the contact site may damage the I/O pads and the probes.